CCxxxx Driver
0.0.1
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Address space for the CCxxxx "normal" registers. More...
Macros | |
#define | CCX_REG_IOCFG2 0x00 |
GDO2 output pin configuration. | |
#define | CCX_REG_IOCFG1 0x01 |
GDO1 output pin configuration. | |
#define | CCX_REG_IOCFG0 0x02 |
GDO0 output pin configuration. | |
#define | CCX_REG_FIFOTHR 0x03 |
RX FIFO and TX FIFO thresholds. | |
#define | CCX_REG_SYNC1 0x04 |
Sync word, high byte. | |
#define | CCX_REG_SYNC0 0x05 |
Sync word, low byte. | |
#define | CCX_REG_PKTLEN 0x06 |
Packet length. | |
#define | CCX_REG_PKTCTRL1 0x07 |
Packet automation control. | |
#define | CCX_REG_PKTCTRL0 0x08 |
Packet automation control. | |
#define | CCX_REG_ADDR 0x09 |
Device address. | |
#define | CCX_REG_CHANNR 0x0A |
Channel number. | |
#define | CCX_REG_FSCTRL1 0x0B |
Frequency synthesizer control. | |
#define | CCX_REG_FSCTRL0 0x0C |
Frequency synthesizer control. | |
#define | CCX_REG_FREQ2 0x0D |
Frequency control word, high byte. | |
#define | CCX_REG_FREQ1 0x0E |
Frequency control word, middle byte. | |
#define | CCX_REG_FREQ0 0x0F |
Frequency control word, low byte. | |
#define | CCX_REG_MDMCFG4 0x10 |
Modem configuration. | |
#define | CCX_REG_MDMCFG3 0x11 |
Modem configuration. | |
#define | CCX_REG_MDMCFG2 0x12 |
Modem configuration. | |
#define | CCX_REG_MDMCFG1 0x13 |
Modem configuration. | |
#define | CCX_REG_MDMCFG0 0x14 |
Modem configuration. | |
#define | CCX_REG_DEVIATN 0x15 |
Modem deviation setting. | |
#define | CCX_REG_MCSM2 0x16 |
Main Radio Control State Machine configuration. | |
#define | CCX_REG_MCSM1 0x17 |
Main Radio Control State Machine configuration. | |
#define | CCX_REG_MCSM0 0x18 |
Main Radio Control State Machine configuration. | |
#define | CCX_REG_FOCCFG 0x19 |
Frequency Offset Compensation configuration. | |
#define | CCX_REG_BSCFG 0x1A |
Bit Synchronization configuration. | |
#define | CCX_REG_AGCCTRL2 0x1B |
AGC control. | |
#define | CCX_REG_AGCCTRL1 0x1C |
AGC control. | |
#define | CCX_REG_AGCCTRL0 0x1D |
AGC control. | |
#define | CCX_REG_WOREVT1 0x1E |
High byte Event 0 timeout. | |
#define | CCX_REG_WOREVT0 0x1F |
Low byte Event 0 timeout. | |
#define | CCX_REG_WORCTRL 0x20 |
Wake On Radio control. | |
#define | CCX_REG_FREND1 0x21 |
Front end RX configuration. | |
#define | CCX_REG_FREND0 0x22 |
Front end TX configuration. | |
#define | CCX_REG_FSCAL3 0x23 |
Frequency synthesizer calibration. | |
#define | CCX_REG_FSCAL2 0x24 |
Frequency synthesizer calibration. | |
#define | CCX_REG_FSCAL1 0x25 |
Frequency synthesizer calibration. | |
#define | CCX_REG_FSCAL0 0x26 |
Frequency synthesizer calibration. | |
#define | CCX_REG_RCCTRL1 0x27 |
RC oscillator configuration. | |
#define | CCX_REG_RCCTRL0 0x28 |
RC oscillator configuration. | |
#define | CCX_REG_FSTEST 0x29 |
Frequency synthesizer calibration control. | |
#define | CCX_REG_PTEST 0x2A |
Production test. | |
#define | CCX_REG_AGCTEST 0x2B |
AGC test. | |
#define | CCX_REG_TEST2 0x2C |
Various test settings. | |
#define | CCX_REG_TEST1 0x2D |
Various test settings. | |
#define | CCX_REG_TEST0 0x2E |
Various test settings. | |
Address space for the CCxxxx "normal" registers.