Raspberry Pi GPIO Library  0.3
Library allowing for control of the Raspberry Pi's GPIO pins.
bcm2835_gpio.h
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1 
32 #ifndef _BCM_2835_
33 #define _BCM_2835_
34 
35 /******************************************************************************/
36 /* The following are the physical GPIO addresses */
37 /******************************************************************************/
38 #define GPFSEL0 0x20200000
39 #define GPFSEL1 0x20200004
40 #define GPFSEL2 0x20200008
41 #define GPFSEL3 0x2020000C
42 #define GPFSEL4 0x20200010
43 #define GPFSEL5 0x20200014
45 #define GPSET0 0x2020001C
46 #define GPSET1 0x20200020
48 #define GPCLR0 0x20200028
49 #define GPCLR1 0x2020002C
51 #define GPLEV0 0x20200034
52 #define GPLEV1 0x20200038
54 #define GPEDS0 0x20200040
55 #define GPEDS1 0x20200044
57 #define GPREN0 0x2020004C
58 #define GPREN1 0x20200050
60 #define GPHEN0 0x20200064
61 #define GPHEN1 0x20200068
63 #define GPAREN0 0x2020007C
64 #define GPAREN1 0x20200080
66 #define GPAFEN0 0x20200088
67 #define GPAFEN1 0x2020008C
69 #define GPPUD 0x20200094
71 #define GPPUDCLK0 0x20200098
72 #define GPPUDCLK1 0x2020009C
75 /**********************************************************************************/
76 /* The following are offset address which can be used with a pointer to GPIO_BASE */
77 /**********************************************************************************/
78 #define GPIO_BASE GPFSEL0
80 #define GPFSEL0_OFFSET 0x000000
81 #define GPFSEL1_OFFSET 0x000004
82 #define GPFSEL2_OFFSET 0x000008
83 #define GPFSEL3_OFFSET 0x00000C
84 #define GPFSEL4_OFFSET 0x000010
85 #define GPFSEL5_OFFSET 0x000014
87 #define GPSET0_OFFSET 0x00001C
88 #define GPSET1_OFFSET 0x000020
90 #define GPCLR0_OFFSET 0x000028
91 #define GPCLR1_OFFSET 0x00002C
93 #define GPLEV0_OFFSET 0x000034
94 #define GPLEV1_OFFSET 0x000038
96 #define GPEDS0_OFFSET 0x000040
97 #define GPEDS1_OFFSET 0x000044
99 #define GPREN0_OFFSET 0x00004C
100 #define GPREN1_OFFSET 0x000050
102 #define GPHEN0_OFFSET 0x000064
103 #define GPHEN1_OFFSET 0x000068
105 #define GPAREN0_OFFSET 0x00007C
106 #define GPAREN1_OFFSET 0x000080
108 #define GPAFEN0_OFFSET 0x000088
109 #define GPAFEN1_OFFSET 0x00008C
111 #define GPPUD_OFFSET 0x000094
113 #define GPPUDCLK0_OFFSET 0x000098
114 #define GPPUDCLK1_OFFSET 0x00009C
117 /**********************************************************************************/
118 /* Function select bits for GPFSELX. In GPFSELX registers each pin has three
119  * bits associated with it. */
120 /**********************************************************************************/
121 #define GPFSEL_INPUT 0x0
122 #define GPFSEL_OUTPUT 0x1
123 #define GPFSEL_ALT0 0x4
124 #define GPFSEL_ALT1 0x5
125 #define GPFSEL_ALT2 0x6
126 #define GPFSEL_ALT3 0x7
127 #define GPFSEL_ALT4 0x3
128 #define GPFSEL_ALT5 0x2
129 #define GPFSEL_BITS 0x7
131 /* Function select bits for GPPUD - the pullup/pulldown resistor register */
132 #define GPPUD_DISABLE 0x0
133 #define GPPUD_PULLDOWN 0x1
134 #define GPPUD_PULLUP 0x2
137 /******************************************************************************/
138 /* The following are the physical BSC / I2C addresses */
139 /******************************************************************************/
140 #define BSC0_C 0x20205000
141 #define BSC0_S 0x20205004
142 #define BSC0_DLEN 0x20205008
143 #define BSC0_A 0x2020500C
144 #define BSC0_FIFO 0x20205010
145 #define BSC0_DIV 0x20205014
146 #define BSC0_DEL 0x20205018
148 #define BSC1_C 0x20804000
149 #define BSC1_S 0x20804004
150 #define BSC1_DLEN 0x20804008
151 #define BSC1_A 0x2080400C
152 #define BSC1_FIFO 0x20804010
153 #define BSC1_DIV 0x20804014
154 #define BSC1_DEL 0x20804018
156 #define BSC2_C 0x20805000
157 #define BSC2_S 0x20805004
158 #define BSC2_DLEN 0x20805008
159 #define BSC2_A 0x2080500C
160 #define BSC2_FIFO 0x20805010
161 #define BSC2_DIV 0x20805014
162 #define BSC2_DEL 0x20805018
164 /**********************************************************************************/
165 /* The following are the base addresses for each BSC module */
166 /**********************************************************************************/
167 #define BSC0_BASE BSC0_C
168 #define BSC1_BASE BSC1_C
169 #define BSC2_BASE BSC2_C
171 /**********************************************************************************/
172 /* The following are offset addresses which can be used with a pointer to the
173  * appropriate BSC base */
174 /**********************************************************************************/
175 #define BSC_C_OFFSET 0x00000000
176 #define BSC_S_OFFSET 0x00000004
177 #define BSC_DLEN_OFFSET 0x00000008
178 #define BSC_A_OFFSET 0x0000000C
179 #define BSC_FIFO_OFFSET 0x00000010
180 #define BSC_DIV_OFFSET 0x00000014
181 #define BSC_DEL_OFFSET 0x00000018
184 /**********************************************************************************/
185 /* The following are the BSC Control Register Bits */
186 /**********************************************************************************/
187 #define BSC_I2CEN 0x8000
188 #define BSC_INTR 0x0400
189 #define BSC_INTT 0x0200
190 #define BSC_INTD 0x0100
191 #define BSC_ST 0x0080
192 #define BSC_CLEAR 0x0010
193 #define BSC_READ 0x0001
195 /**********************************************************************************/
196 /* The following are the BSC Status Register Bits */
197 /**********************************************************************************/
198 #define BSC_CLKT 0x200
199 #define BSC_ERR 0x100
200 #define BSC_RXF 0x080
201 #define BSC_TXE 0x040
202 #define BSC_RXD 0x020
203 #define BSC_TXD 0x010
204 #define BSC_RXR 0x008
205 #define BSC_TXW 0x004
206 #define BSC_DONE 0x002
207 #define BSC_TA 0x001
209 #define BSC_FIFO_SIZE 16
210 #endif /* _BCM_2835_ */