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Raspberry Pi GPIO Library
0.3
Library allowing for control of the Raspberry Pi's GPIO pins.
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Header file for BCM2835 GPIO registers. More...
Go to the source code of this file.
Macros | |
| #define | GPFSEL0 0x20200000 |
| #define | GPFSEL1 0x20200004 |
| #define | GPFSEL2 0x20200008 |
| #define | GPFSEL3 0x2020000C |
| #define | GPFSEL4 0x20200010 |
| #define | GPFSEL5 0x20200014 |
| #define | GPSET0 0x2020001C |
| #define | GPSET1 0x20200020 |
| #define | GPCLR0 0x20200028 |
| #define | GPCLR1 0x2020002C |
| #define | GPLEV0 0x20200034 |
| #define | GPLEV1 0x20200038 |
| #define | GPEDS0 0x20200040 |
| #define | GPEDS1 0x20200044 |
| #define | GPREN0 0x2020004C |
| #define | GPREN1 0x20200050 |
| #define | GPHEN0 0x20200064 |
| #define | GPHEN1 0x20200068 |
| #define | GPAREN0 0x2020007C |
| #define | GPAREN1 0x20200080 |
| #define | GPAFEN0 0x20200088 |
| #define | GPAFEN1 0x2020008C |
| #define | GPPUD 0x20200094 |
| #define | GPPUDCLK0 0x20200098 |
| #define | GPPUDCLK1 0x2020009C |
| #define | GPIO_BASE GPFSEL0 |
| #define | GPFSEL0_OFFSET 0x000000 |
| #define | GPFSEL1_OFFSET 0x000004 |
| #define | GPFSEL2_OFFSET 0x000008 |
| #define | GPFSEL3_OFFSET 0x00000C |
| #define | GPFSEL4_OFFSET 0x000010 |
| #define | GPFSEL5_OFFSET 0x000014 |
| #define | GPSET0_OFFSET 0x00001C |
| #define | GPSET1_OFFSET 0x000020 |
| #define | GPCLR0_OFFSET 0x000028 |
| #define | GPCLR1_OFFSET 0x00002C |
| #define | GPLEV0_OFFSET 0x000034 |
| #define | GPLEV1_OFFSET 0x000038 |
| #define | GPEDS0_OFFSET 0x000040 |
| #define | GPEDS1_OFFSET 0x000044 |
| #define | GPREN0_OFFSET 0x00004C |
| #define | GPREN1_OFFSET 0x000050 |
| #define | GPHEN0_OFFSET 0x000064 |
| #define | GPHEN1_OFFSET 0x000068 |
| #define | GPAREN0_OFFSET 0x00007C |
| #define | GPAREN1_OFFSET 0x000080 |
| #define | GPAFEN0_OFFSET 0x000088 |
| #define | GPAFEN1_OFFSET 0x00008C |
| #define | GPPUD_OFFSET 0x000094 |
| #define | GPPUDCLK0_OFFSET 0x000098 |
| #define | GPPUDCLK1_OFFSET 0x00009C |
| #define | GPFSEL_INPUT 0x0 |
| #define | GPFSEL_OUTPUT 0x1 |
| #define | GPFSEL_ALT0 0x4 |
| #define | GPFSEL_ALT1 0x5 |
| #define | GPFSEL_ALT2 0x6 |
| #define | GPFSEL_ALT3 0x7 |
| #define | GPFSEL_ALT4 0x3 |
| #define | GPFSEL_ALT5 0x2 |
| #define | GPFSEL_BITS 0x7 |
| #define | GPPUD_DISABLE 0x0 |
| #define | GPPUD_PULLDOWN 0x1 |
| #define | GPPUD_PULLUP 0x2 |
| #define | BSC0_C 0x20205000 |
| #define | BSC0_S 0x20205004 |
| #define | BSC0_DLEN 0x20205008 |
| #define | BSC0_A 0x2020500C |
| #define | BSC0_FIFO 0x20205010 |
| #define | BSC0_DIV 0x20205014 |
| #define | BSC0_DEL 0x20205018 |
| #define | BSC1_C 0x20804000 |
| #define | BSC1_S 0x20804004 |
| #define | BSC1_DLEN 0x20804008 |
| #define | BSC1_A 0x2080400C |
| #define | BSC1_FIFO 0x20804010 |
| #define | BSC1_DIV 0x20804014 |
| #define | BSC1_DEL 0x20804018 |
| #define | BSC2_C 0x20805000 |
| #define | BSC2_S 0x20805004 |
| #define | BSC2_DLEN 0x20805008 |
| #define | BSC2_A 0x2080500C |
| #define | BSC2_FIFO 0x20805010 |
| #define | BSC2_DIV 0x20805014 |
| #define | BSC2_DEL 0x20805018 |
| #define | BSC0_BASE BSC0_C |
| #define | BSC1_BASE BSC1_C |
| #define | BSC2_BASE BSC2_C |
| #define | BSC_C_OFFSET 0x00000000 |
| #define | BSC_S_OFFSET 0x00000004 |
| #define | BSC_DLEN_OFFSET 0x00000008 |
| #define | BSC_A_OFFSET 0x0000000C |
| #define | BSC_FIFO_OFFSET 0x00000010 |
| #define | BSC_DIV_OFFSET 0x00000014 |
| #define | BSC_DEL_OFFSET 0x00000018 |
| #define | BSC_I2CEN 0x8000 |
| #define | BSC_INTR 0x0400 |
| #define | BSC_INTT 0x0200 |
| #define | BSC_INTD 0x0100 |
| #define | BSC_ST 0x0080 |
| #define | BSC_CLEAR 0x0010 |
| #define | BSC_READ 0x0001 |
| #define | BSC_CLKT 0x200 |
| #define | BSC_ERR 0x100 |
| #define | BSC_RXF 0x080 |
| #define | BSC_TXE 0x040 |
| #define | BSC_RXD 0x020 |
| #define | BSC_TXD 0x010 |
| #define | BSC_RXR 0x008 |
| #define | BSC_TXW 0x004 |
| #define | BSC_DONE 0x002 |
| #define | BSC_TA 0x001 |
| #define | BSC_FIFO_SIZE 16 |
Header file for BCM2835 GPIO registers.
This is is part of https://github.com/alanbarr/RaspberryPi-GPIO a C library for basic control of the Raspberry Pi's GPIO pins. Copyright (C) Alan Barr 2012
This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with this program. If not, see http://www.gnu.org/licenses/.
The addresses of the GPIO registers are the physical addresses of the GPIO registers as available through /dev/mem. From page 6 of BCM2835 ARM Peripherals: Physical addresses range from 0x20000000 to 0x20FFFFFF for peripherals. The bus addresses for peripherals are set up to map onto the peripheral bus address range starting at 0x7E000000. Thus a peripheral advertised here at bus address 0x7Ennnnnn is available at physical address 0x20nnnnnn.
Definition in file bcm2835_gpio.h.
| #define BSC0_A 0x2020500C |
BSC0 Slave Address Register Address
Definition at line 143 of file bcm2835_gpio.h.
| #define BSC0_BASE BSC0_C |
BSC0 Base Address
Definition at line 167 of file bcm2835_gpio.h.
| #define BSC0_C 0x20205000 |
BSC0 Control Register Address
Definition at line 140 of file bcm2835_gpio.h.
| #define BSC0_DEL 0x20205018 |
BSC0 Data Delay Register Address
Definition at line 146 of file bcm2835_gpio.h.
| #define BSC0_DIV 0x20205014 |
BSC0 Clock Divider Register Address
Definition at line 145 of file bcm2835_gpio.h.
| #define BSC0_DLEN 0x20205008 |
BSC0 Data Length Register Address
Definition at line 142 of file bcm2835_gpio.h.
| #define BSC0_FIFO 0x20205010 |
BSC0 Data FIFO Register Address
Definition at line 144 of file bcm2835_gpio.h.
| #define BSC0_S 0x20205004 |
BSC0 Status Register Address
Definition at line 141 of file bcm2835_gpio.h.
| #define BSC1_A 0x2080400C |
BSC1 Slave Address Register Address
Definition at line 151 of file bcm2835_gpio.h.
| #define BSC1_BASE BSC1_C |
BSC1 Base Address
Definition at line 168 of file bcm2835_gpio.h.
| #define BSC1_C 0x20804000 |
BSC1 Control Register Address
Definition at line 148 of file bcm2835_gpio.h.
| #define BSC1_DEL 0x20804018 |
BSC1 Data Delay Register Address
Definition at line 154 of file bcm2835_gpio.h.
| #define BSC1_DIV 0x20804014 |
BSC1 Clock Divider Register Address
Definition at line 153 of file bcm2835_gpio.h.
| #define BSC1_DLEN 0x20804008 |
BSC1 Data Length Register Address
Definition at line 150 of file bcm2835_gpio.h.
| #define BSC1_FIFO 0x20804010 |
BSC1 Data FIFO Register Address
Definition at line 152 of file bcm2835_gpio.h.
| #define BSC1_S 0x20804004 |
BSC1 Status Register Address
Definition at line 149 of file bcm2835_gpio.h.
| #define BSC2_A 0x2080500C |
BSC2 Slave Address Register Address
Definition at line 159 of file bcm2835_gpio.h.
| #define BSC2_BASE BSC2_C |
BSC2 Base Address
Definition at line 169 of file bcm2835_gpio.h.
| #define BSC2_C 0x20805000 |
BSC2 Control Register Address
Definition at line 156 of file bcm2835_gpio.h.
| #define BSC2_DEL 0x20805018 |
BSC2 Data Delay Register Address
Definition at line 162 of file bcm2835_gpio.h.
| #define BSC2_DIV 0x20805014 |
BSC2 Clock Divider Register Address
Definition at line 161 of file bcm2835_gpio.h.
| #define BSC2_DLEN 0x20805008 |
BSC2 Data Length Register Address
Definition at line 158 of file bcm2835_gpio.h.
| #define BSC2_FIFO 0x20805010 |
BSC2 Data FIFO Register Address
Definition at line 160 of file bcm2835_gpio.h.
| #define BSC2_S 0x20805004 |
BSC2 Status Register Address
Definition at line 157 of file bcm2835_gpio.h.
| #define BSC_A_OFFSET 0x0000000C |
BSC Slave Address offset from BSCx_BASE
Definition at line 178 of file bcm2835_gpio.h.
| #define BSC_C_OFFSET 0x00000000 |
BSC Control offset from BSCx_BASE
Definition at line 175 of file bcm2835_gpio.h.
| #define BSC_CLEAR 0x0010 |
BSC Control: Clear FIFO bit
Definition at line 192 of file bcm2835_gpio.h.
| #define BSC_CLKT 0x200 |
BSC Status: Clock Stretch Timeout bit
Definition at line 198 of file bcm2835_gpio.h.
| #define BSC_DEL_OFFSET 0x00000018 |
BSC Data Delay offset from BSCx_BASE
Definition at line 181 of file bcm2835_gpio.h.
| #define BSC_DIV_OFFSET 0x00000014 |
BSC Clock Divider offset from BSCx_BASE
Definition at line 180 of file bcm2835_gpio.h.
| #define BSC_DLEN_OFFSET 0x00000008 |
BSC Data Length offset from BSCx_BASE
Definition at line 177 of file bcm2835_gpio.h.
| #define BSC_DONE 0x002 |
BSC Status: Transfer Done
Definition at line 206 of file bcm2835_gpio.h.
| #define BSC_ERR 0x100 |
BSC Status: Ack Error bit
Definition at line 199 of file bcm2835_gpio.h.
| #define BSC_FIFO_OFFSET 0x00000010 |
BSC Data FIFO offset from BSCx_BASE
Definition at line 179 of file bcm2835_gpio.h.
| #define BSC_FIFO_SIZE 16 |
BSC FIFO Size
Definition at line 209 of file bcm2835_gpio.h.
| #define BSC_I2CEN 0x8000 |
BSC Control: I2C Enable Bit
Definition at line 187 of file bcm2835_gpio.h.
| #define BSC_INTD 0x0100 |
BSC Control: Interrupt on DONE bit
Definition at line 190 of file bcm2835_gpio.h.
| #define BSC_INTR 0x0400 |
BSC Control: Interrupt on RX bit
Definition at line 188 of file bcm2835_gpio.h.
| #define BSC_INTT 0x0200 |
BSC Control: Interrupt on TX bit
Definition at line 189 of file bcm2835_gpio.h.
| #define BSC_READ 0x0001 |
BSC Control: Read Packet Transfer bit
Definition at line 193 of file bcm2835_gpio.h.
| #define BSC_RXD 0x020 |
BSC Status: FIFO Contains Data
Definition at line 202 of file bcm2835_gpio.h.
| #define BSC_RXF 0x080 |
BSC Status: FIFO Full bit
Definition at line 200 of file bcm2835_gpio.h.
| #define BSC_RXR 0x008 |
BSC Status: FIFO Needs Reading bit
Definition at line 204 of file bcm2835_gpio.h.
| #define BSC_S_OFFSET 0x00000004 |
BSC Status offset from BSCx_BASE
Definition at line 176 of file bcm2835_gpio.h.
| #define BSC_ST 0x0080 |
BSC Control: Start transfer bit
Definition at line 191 of file bcm2835_gpio.h.
| #define BSC_TA 0x001 |
BSC Status: Transfer Active
Definition at line 207 of file bcm2835_gpio.h.
| #define BSC_TXD 0x010 |
BSC Status: FIFO Can Accept Data bit
Definition at line 203 of file bcm2835_gpio.h.
| #define BSC_TXE 0x040 |
BSC Status: FIFO Empty bit
Definition at line 201 of file bcm2835_gpio.h.
| #define BSC_TXW 0x004 |
BSC Status: FIFO Needs Writing bit
Definition at line 205 of file bcm2835_gpio.h.
| #define GPAFEN0 0x20200088 |
GPIO Pin Async. Falling Edge Detect 0 Register Address
Definition at line 66 of file bcm2835_gpio.h.
| #define GPAFEN0_OFFSET 0x000088 |
GPIO Pin Async. Falling Edge Detect 0 Offset from GPIO_BASE
Definition at line 108 of file bcm2835_gpio.h.
| #define GPAFEN1 0x2020008C |
GPIO Pin Async. Falling Edge Detect 1 Register Address
Definition at line 67 of file bcm2835_gpio.h.
| #define GPAFEN1_OFFSET 0x00008C |
GPIO Pin Async. Falling Edge Detect 1 Offset from GPIO_BASE
Definition at line 109 of file bcm2835_gpio.h.
| #define GPAREN0 0x2020007C |
GPIO Pin Async. Rising Edge Detect 0 Register Address
Definition at line 63 of file bcm2835_gpio.h.
| #define GPAREN0_OFFSET 0x00007C |
GPIO Pin Async. Rising Edge Detect 0 Offset from GPIO_BASE
Definition at line 105 of file bcm2835_gpio.h.
| #define GPAREN1 0x20200080 |
GPIO Pin Async. Rising Edge Detect 1 Register Address
Definition at line 64 of file bcm2835_gpio.h.
| #define GPAREN1_OFFSET 0x000080 |
GPIO Pin Async. Rising Edge Detect 1 Offset from GPIO_BASE
Definition at line 106 of file bcm2835_gpio.h.
| #define GPCLR0 0x20200028 |
GPIO Pin Output Clear 0 Register Address
Definition at line 48 of file bcm2835_gpio.h.
| #define GPCLR0_OFFSET 0x000028 |
GPIO Pin Output Clear 0 Offset from GPIO_BASE
Definition at line 90 of file bcm2835_gpio.h.
| #define GPCLR1 0x2020002C |
GPIO Pin Output Clear 1 Register Address
Definition at line 49 of file bcm2835_gpio.h.
| #define GPCLR1_OFFSET 0x00002C |
GPIO Pin Output Clear 1 Offset from GPIO_BASE
Definition at line 91 of file bcm2835_gpio.h.
| #define GPEDS0 0x20200040 |
GPIO Pin Event Detect Status 0 Register Address
Definition at line 54 of file bcm2835_gpio.h.
| #define GPEDS0_OFFSET 0x000040 |
GPIO Pin Event Detect Status 0 Offset from GPIO_BASE
Definition at line 96 of file bcm2835_gpio.h.
| #define GPEDS1 0x20200044 |
GPIO Pin Event Detect Status 1 Register Address
Definition at line 55 of file bcm2835_gpio.h.
| #define GPEDS1_OFFSET 0x000044 |
GPIO Pin Event Detect Status 1 Offset from GPIO_BASE
Definition at line 97 of file bcm2835_gpio.h.
| #define GPFSEL0 0x20200000 |
GPIO Function Select 0 Register Address
Definition at line 38 of file bcm2835_gpio.h.
| #define GPFSEL0_OFFSET 0x000000 |
GPIO Function Select 0 Offset from GPIO_BASE
Definition at line 80 of file bcm2835_gpio.h.
| #define GPFSEL1 0x20200004 |
GPIO Function Select 1 Register Address
Definition at line 39 of file bcm2835_gpio.h.
| #define GPFSEL1_OFFSET 0x000004 |
GPIO Function Select 1 Offset from GPIO_BASE
Definition at line 81 of file bcm2835_gpio.h.
| #define GPFSEL2 0x20200008 |
GPIO Function Select 2 Register Address
Definition at line 40 of file bcm2835_gpio.h.
| #define GPFSEL2_OFFSET 0x000008 |
GPIO Function Select 2 Offset from GPIO_BASE
Definition at line 82 of file bcm2835_gpio.h.
| #define GPFSEL3 0x2020000C |
GPIO Function Select 3 Register Address
Definition at line 41 of file bcm2835_gpio.h.
| #define GPFSEL3_OFFSET 0x00000C |
GPIO Function Select 3 Offset from GPIO_BASE
Definition at line 83 of file bcm2835_gpio.h.
| #define GPFSEL4 0x20200010 |
GPIO Function Select 4 Register Address
Definition at line 42 of file bcm2835_gpio.h.
| #define GPFSEL4_OFFSET 0x000010 |
GPIO Function Select 4 Offset from GPIO_BASE
Definition at line 84 of file bcm2835_gpio.h.
| #define GPFSEL5 0x20200014 |
GPIO Function Select 5 Register Address
Definition at line 43 of file bcm2835_gpio.h.
| #define GPFSEL5_OFFSET 0x000014 |
GPIO Function Select 5 Offset from GPIO_BASE
Definition at line 85 of file bcm2835_gpio.h.
| #define GPFSEL_ALT0 0x4 |
Sets a pin to alternative function 0
Definition at line 123 of file bcm2835_gpio.h.
| #define GPFSEL_ALT1 0x5 |
Sets a pin to alternative function 1
Definition at line 124 of file bcm2835_gpio.h.
| #define GPFSEL_ALT2 0x6 |
Sets a pin to alternative function 2
Definition at line 125 of file bcm2835_gpio.h.
| #define GPFSEL_ALT3 0x7 |
Sets a pin to alternative function 3
Definition at line 126 of file bcm2835_gpio.h.
| #define GPFSEL_ALT4 0x3 |
Sets a pin to alternative function 4
Definition at line 127 of file bcm2835_gpio.h.
| #define GPFSEL_ALT5 0x2 |
Sets a pin to alternative function 5
Definition at line 128 of file bcm2835_gpio.h.
| #define GPFSEL_BITS 0x7 |
Three bits per GPIO in the GPFSEL register
Definition at line 129 of file bcm2835_gpio.h.
| #define GPFSEL_INPUT 0x0 |
Sets a pin to input mode
Definition at line 121 of file bcm2835_gpio.h.
| #define GPFSEL_OUTPUT 0x1 |
Sets a pin to output mode
Definition at line 122 of file bcm2835_gpio.h.
| #define GPHEN0 0x20200064 |
GPIO Pin High Detect Enable 0 Register Address
Definition at line 60 of file bcm2835_gpio.h.
| #define GPHEN0_OFFSET 0x000064 |
GPIO Pin High Detect Enable 0 Offset from GPIO_BASE
Definition at line 102 of file bcm2835_gpio.h.
| #define GPHEN1 0x20200068 |
GPIO Pin High Detect Enable 1 Register Address
Definition at line 61 of file bcm2835_gpio.h.
| #define GPHEN1_OFFSET 0x000068 |
GPIO Pin High Detect Enable 1 Offset from GPIO_BASE
Definition at line 103 of file bcm2835_gpio.h.
| #define GPIO_BASE GPFSEL0 |
First GPIO address of interest.
Definition at line 78 of file bcm2835_gpio.h.
| #define GPLEV0 0x20200034 |
GPIO Pin Level 0 Register Address
Definition at line 51 of file bcm2835_gpio.h.
| #define GPLEV0_OFFSET 0x000034 |
GPIO Pin Level 0 Offset from GPIO_BASE
Definition at line 93 of file bcm2835_gpio.h.
| #define GPLEV1 0x20200038 |
GPIO Pin Level 1 Register Address
Definition at line 52 of file bcm2835_gpio.h.
| #define GPLEV1_OFFSET 0x000038 |
GPIO Pin Level 1 Offset from GPIO_BASE
Definition at line 94 of file bcm2835_gpio.h.
| #define GPPUD 0x20200094 |
GPIO Pin Pull-up/down Enable Register Address
Definition at line 69 of file bcm2835_gpio.h.
| #define GPPUD_DISABLE 0x0 |
Disables the resistor
Definition at line 132 of file bcm2835_gpio.h.
| #define GPPUD_OFFSET 0x000094 |
GPIO Pin Pull-up/down Enable Offset from GPIO_BASE
Definition at line 111 of file bcm2835_gpio.h.
| #define GPPUD_PULLDOWN 0x1 |
Enables a pulldown resistor
Definition at line 133 of file bcm2835_gpio.h.
| #define GPPUD_PULLUP 0x2 |
Enables a pullup resistor
Definition at line 134 of file bcm2835_gpio.h.
| #define GPPUDCLK0 0x20200098 |
GPIO Pin Pull-up/down Enable Clock 0 Register Address
Definition at line 71 of file bcm2835_gpio.h.
| #define GPPUDCLK0_OFFSET 0x000098 |
GPIO Pin Pull-up/down Enable Clock 0 Offset from GPIO_BASE
Definition at line 113 of file bcm2835_gpio.h.
| #define GPPUDCLK1 0x2020009C |
GPIO Pin Pull-up/down Enable Clock 1 Register Address
Definition at line 72 of file bcm2835_gpio.h.
| #define GPPUDCLK1_OFFSET 0x00009C |
GPIO Pin Pull-up/down Enable Clock 1 Offset from GPIO_BASE
Definition at line 114 of file bcm2835_gpio.h.
| #define GPREN0 0x2020004C |
GPIO Pin Rising Edge Detect Enable 0 Register Address
Definition at line 57 of file bcm2835_gpio.h.
| #define GPREN0_OFFSET 0x00004C |
GPIO Pin Rising Edge Detect Enable 0 Offset from GPIO_BASE
Definition at line 99 of file bcm2835_gpio.h.
| #define GPREN1 0x20200050 |
GPIO Pin Rising Edge Detect Enable 1 Register Address
Definition at line 58 of file bcm2835_gpio.h.
| #define GPREN1_OFFSET 0x000050 |
GPIO Pin Rising Edge Detect Enable 1 Offset from GPIO_BASE
Definition at line 100 of file bcm2835_gpio.h.
| #define GPSET0 0x2020001C |
GPIO Pin Output Set 0 Register Address
Definition at line 45 of file bcm2835_gpio.h.
| #define GPSET0_OFFSET 0x00001C |
GPIO Pin Output Set 0 Offset from GPIO_BASE
Definition at line 87 of file bcm2835_gpio.h.
| #define GPSET1 0x20200020 |
GPIO Pin Output Set 1 Register Address
Definition at line 46 of file bcm2835_gpio.h.
| #define GPSET1_OFFSET 0x000020 |
GPIO Pin Output Set 1 Offset from GPIO_BASE
Definition at line 88 of file bcm2835_gpio.h.
1.8.13